+++ /dev/null
-From 05e090620bacf317020f9591cfff8926093380bd Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@linaro.org>
-Date: Fri, 24 Oct 2025 14:23:35 +0300
-Subject: [PATCH] net: airoha: Fix a copy and paste bug in probe()
-
-This code has a copy and paste bug where it accidentally checks "if (err)"
-instead of checking if "xsi_rsts" is NULL. Also, as a free bonus, I
-changed the allocation from kzalloc() to kcalloc() which is a kernel
-hardening measure to protect against integer overflows.
-
-Fixes: 5863b4e065e2 ("net: airoha: Add airoha_eth_soc_data struct")
-Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
-Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
-Link: https://patch.msgid.link/aPtht6y5DRokn9zv@stanley.mountain
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/ethernet/airoha/airoha_eth.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/net/ethernet/airoha/airoha_eth.c
-+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -2990,11 +2990,11 @@ static int airoha_probe(struct platform_
- return err;
- }
-
-- xsi_rsts = devm_kzalloc(eth->dev,
-- eth->soc->num_xsi_rsts * sizeof(*xsi_rsts),
-+ xsi_rsts = devm_kcalloc(eth->dev,
-+ eth->soc->num_xsi_rsts, sizeof(*xsi_rsts),
- GFP_KERNEL);
-- if (err)
-- return err;
-+ if (!xsi_rsts)
-+ return -ENOMEM;
-
- eth->xsi_rsts = xsi_rsts;
- for (i = 0; i < eth->soc->num_xsi_rsts; i++)
--- /dev/null
+From 05e090620bacf317020f9591cfff8926093380bd Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@linaro.org>
+Date: Fri, 24 Oct 2025 14:23:35 +0300
+Subject: [PATCH] net: airoha: Fix a copy and paste bug in probe()
+
+This code has a copy and paste bug where it accidentally checks "if (err)"
+instead of checking if "xsi_rsts" is NULL. Also, as a free bonus, I
+changed the allocation from kzalloc() to kcalloc() which is a kernel
+hardening measure to protect against integer overflows.
+
+Fixes: 5863b4e065e2 ("net: airoha: Add airoha_eth_soc_data struct")
+Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
+Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://patch.msgid.link/aPtht6y5DRokn9zv@stanley.mountain
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
++++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -2990,11 +2990,11 @@ static int airoha_probe(struct platform_
+ return err;
+ }
+
+- xsi_rsts = devm_kzalloc(eth->dev,
+- eth->soc->num_xsi_rsts * sizeof(*xsi_rsts),
++ xsi_rsts = devm_kcalloc(eth->dev,
++ eth->soc->num_xsi_rsts, sizeof(*xsi_rsts),
+ GFP_KERNEL);
+- if (err)
+- return err;
++ if (!xsi_rsts)
++ return -ENOMEM;
+
+ eth->xsi_rsts = xsi_rsts;
+ for (i = 0; i < eth->soc->num_xsi_rsts; i++)
+++ /dev/null
-From 4cd9d227ab838b3590c4b27e3707b8c3ef14d7e9 Mon Sep 17 00:00:00 2001
-From: Lorenzo Bianconi <lorenzo@kernel.org>
-Date: Wed, 25 Jun 2025 16:43:15 +0200
-Subject: [PATCH] net: airoha: Get rid of dma_sync_single_for_device() in
- airoha_qdma_fill_rx_queue()
-
-Since the page_pool for airoha_eth driver is created with
-PP_FLAG_DMA_SYNC_DEV flag, we do not need to sync_for_device each page
-received from the pool since it is already done by the page_pool codebase.
-
-Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
-Reviewed-by: Alexander Lobakin <aleksander.lobakin@intel.com>
-Link: https://patch.msgid.link/20250625-airoha-sync-for-device-v1-1-923741deaabf@kernel.org
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/ethernet/airoha/airoha_eth.c | 5 -----
- 1 file changed, 5 deletions(-)
-
---- a/drivers/net/ethernet/airoha/airoha_eth.c
-+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -539,9 +539,7 @@ static int airoha_fe_init(struct airoha_
-
- static int airoha_qdma_fill_rx_queue(struct airoha_queue *q)
- {
-- enum dma_data_direction dir = page_pool_get_dma_dir(q->page_pool);
- struct airoha_qdma *qdma = q->qdma;
-- struct airoha_eth *eth = qdma->eth;
- int qid = q - &qdma->q_rx[0];
- int nframes = 0;
-
-@@ -565,9 +563,6 @@ static int airoha_qdma_fill_rx_queue(str
- e->dma_addr = page_pool_get_dma_addr(page) + offset;
- e->dma_len = SKB_WITH_OVERHEAD(q->buf_size);
-
-- dma_sync_single_for_device(eth->dev, e->dma_addr, e->dma_len,
-- dir);
--
- val = FIELD_PREP(QDMA_DESC_LEN_MASK, e->dma_len);
- WRITE_ONCE(desc->ctrl, cpu_to_le32(val));
- WRITE_ONCE(desc->addr, cpu_to_le32(e->dma_addr));
--- /dev/null
+From 4cd9d227ab838b3590c4b27e3707b8c3ef14d7e9 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 25 Jun 2025 16:43:15 +0200
+Subject: [PATCH] net: airoha: Get rid of dma_sync_single_for_device() in
+ airoha_qdma_fill_rx_queue()
+
+Since the page_pool for airoha_eth driver is created with
+PP_FLAG_DMA_SYNC_DEV flag, we do not need to sync_for_device each page
+received from the pool since it is already done by the page_pool codebase.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Alexander Lobakin <aleksander.lobakin@intel.com>
+Link: https://patch.msgid.link/20250625-airoha-sync-for-device-v1-1-923741deaabf@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c | 5 -----
+ 1 file changed, 5 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
++++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -539,9 +539,7 @@ static int airoha_fe_init(struct airoha_
+
+ static int airoha_qdma_fill_rx_queue(struct airoha_queue *q)
+ {
+- enum dma_data_direction dir = page_pool_get_dma_dir(q->page_pool);
+ struct airoha_qdma *qdma = q->qdma;
+- struct airoha_eth *eth = qdma->eth;
+ int qid = q - &qdma->q_rx[0];
+ int nframes = 0;
+
+@@ -565,9 +563,6 @@ static int airoha_qdma_fill_rx_queue(str
+ e->dma_addr = page_pool_get_dma_addr(page) + offset;
+ e->dma_len = SKB_WITH_OVERHEAD(q->buf_size);
+
+- dma_sync_single_for_device(eth->dev, e->dma_addr, e->dma_len,
+- dir);
+-
+ val = FIELD_PREP(QDMA_DESC_LEN_MASK, e->dma_len);
+ WRITE_ONCE(desc->ctrl, cpu_to_le32(val));
+ WRITE_ONCE(desc->addr, cpu_to_le32(e->dma_addr));
+++ /dev/null
-From 3cd582e7d0787506990ef0180405eb6224fa90a6 Mon Sep 17 00:00:00 2001
-From: Alok Tiwari <alok.a.tiwari@oracle.com>
-Date: Tue, 15 Jul 2025 07:30:58 -0700
-Subject: [PATCH] net: airoha: fix potential use-after-free in airoha_npu_get()
-
-np->name was being used after calling of_node_put(np), which
-releases the node and can lead to a use-after-free bug.
-Previously, of_node_put(np) was called unconditionally after
-of_find_device_by_node(np), which could result in a use-after-free if
-pdev is NULL.
-
-This patch moves of_node_put(np) after the error check to ensure
-the node is only released after both the error and success cases
-are handled appropriately, preventing potential resource issues.
-
-Fixes: 23290c7bc190 ("net: airoha: Introduce Airoha NPU support")
-Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-Link: https://patch.msgid.link/20250715143102.3458286-1-alok.a.tiwari@oracle.com
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/ethernet/airoha/airoha_npu.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/airoha/airoha_npu.c
-+++ b/drivers/net/ethernet/airoha/airoha_npu.c
-@@ -567,12 +567,13 @@ struct airoha_npu *airoha_npu_get(struct
- return ERR_PTR(-ENODEV);
-
- pdev = of_find_device_by_node(np);
-- of_node_put(np);
-
- if (!pdev) {
- dev_err(dev, "cannot find device node %s\n", np->name);
-+ of_node_put(np);
- return ERR_PTR(-ENODEV);
- }
-+ of_node_put(np);
-
- if (!try_module_get(THIS_MODULE)) {
- dev_err(dev, "failed to get the device driver module\n");
--- /dev/null
+From 3cd582e7d0787506990ef0180405eb6224fa90a6 Mon Sep 17 00:00:00 2001
+From: Alok Tiwari <alok.a.tiwari@oracle.com>
+Date: Tue, 15 Jul 2025 07:30:58 -0700
+Subject: [PATCH] net: airoha: fix potential use-after-free in airoha_npu_get()
+
+np->name was being used after calling of_node_put(np), which
+releases the node and can lead to a use-after-free bug.
+Previously, of_node_put(np) was called unconditionally after
+of_find_device_by_node(np), which could result in a use-after-free if
+pdev is NULL.
+
+This patch moves of_node_put(np) after the error check to ensure
+the node is only released after both the error and success cases
+are handled appropriately, preventing potential resource issues.
+
+Fixes: 23290c7bc190 ("net: airoha: Introduce Airoha NPU support")
+Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/20250715143102.3458286-1-alok.a.tiwari@oracle.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
++++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -567,12 +567,13 @@ struct airoha_npu *airoha_npu_get(struct
+ return ERR_PTR(-ENODEV);
+
+ pdev = of_find_device_by_node(np);
+- of_node_put(np);
+
+ if (!pdev) {
+ dev_err(dev, "cannot find device node %s\n", np->name);
++ of_node_put(np);
+ return ERR_PTR(-ENODEV);
+ }
++ of_node_put(np);
+
+ if (!try_module_get(THIS_MODULE)) {
+ dev_err(dev, "failed to get the device driver module\n");
+++ /dev/null
-From 7e112e51d48db09739dd73c90411fc8a5635747f Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Thu, 22 May 2025 15:13:10 +0200
-Subject: [PATCH 2/3] net: dsa: mt7530: Add AN7583 support
-
-Add Airoha AN7583 Switch support. This is based on Airoha EN7581 that is
-based on Mediatek MT7988 Switch.
-
-Airoha AN7583 require additional tweak to the GEPHY_CONN_CFG register to
-make the internal PHY work.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
----
- drivers/net/dsa/mt7530-mmio.c | 1 +
- drivers/net/dsa/mt7530.c | 24 ++++++++++++++++++++++--
- drivers/net/dsa/mt7530.h | 18 ++++++++++++++----
- 3 files changed, 37 insertions(+), 6 deletions(-)
-
---- a/drivers/net/dsa/mt7530-mmio.c
-+++ b/drivers/net/dsa/mt7530-mmio.c
-@@ -11,6 +11,7 @@
- #include "mt7530.h"
-
- static const struct of_device_id mt7988_of_match[] = {
-+ { .compatible = "airoha,an7583-switch", .data = &mt753x_table[ID_AN7583], },
- { .compatible = "airoha,en7581-switch", .data = &mt753x_table[ID_EN7581], },
- { .compatible = "mediatek,mt7988-switch", .data = &mt753x_table[ID_MT7988], },
- { /* sentinel */ },
---- a/drivers/net/dsa/mt7530.c
-+++ b/drivers/net/dsa/mt7530.c
-@@ -1153,7 +1153,7 @@ mt753x_cpu_port_enable(struct dsa_switch
- * is affine to the inbound user port.
- */
- if (priv->id == ID_MT7531 || priv->id == ID_MT7988 ||
-- priv->id == ID_EN7581)
-+ priv->id == ID_EN7581 || priv->id == ID_AN7583)
- mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));
-
- /* CPU port gets connected to all user ports of
-@@ -2589,7 +2589,7 @@ mt7531_setup_common(struct dsa_switch *d
- mt7530_set(priv, MT753X_AGC, LOCAL_EN);
-
- /* Enable Special Tag for rx frames */
-- if (priv->id == ID_EN7581)
-+ if (priv->id == ID_EN7581 || priv->id == ID_AN7583)
- mt7530_write(priv, MT753X_CPORT_SPTAG_CFG,
- CPORT_SW2FE_STAG_EN | CPORT_FE2SW_STAG_EN);
-
-@@ -3157,6 +3157,16 @@ static int mt7988_setup(struct dsa_switc
- reset_control_deassert(priv->rstc);
- usleep_range(20, 50);
-
-+ /* AN7583 require additional tweak to CONN_CFG */
-+ if (priv->id == ID_AN7583)
-+ mt7530_rmw(priv, AN7583_GEPHY_CONN_CFG,
-+ AN7583_CSR_DPHY_CKIN_SEL |
-+ AN7583_CSR_PHY_CORE_REG_CLK_SEL |
-+ AN7583_CSR_ETHER_AFE_PWD,
-+ AN7583_CSR_DPHY_CKIN_SEL |
-+ AN7583_CSR_PHY_CORE_REG_CLK_SEL |
-+ FIELD_PREP(AN7583_CSR_ETHER_AFE_PWD, 0));
-+
- /* Reset the switch PHYs */
- mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_PHY_RST);
-
-@@ -3253,6 +3263,16 @@ const struct mt753x_info mt753x_table[]
- .pcs_ops = &mt7530_pcs_ops,
- .sw_setup = mt7988_setup,
- .phy_read_c22 = mt7531_ind_c22_phy_read,
-+ .phy_write_c22 = mt7531_ind_c22_phy_write,
-+ .phy_read_c45 = mt7531_ind_c45_phy_read,
-+ .phy_write_c45 = mt7531_ind_c45_phy_write,
-+ .mac_port_get_caps = en7581_mac_port_get_caps,
-+ },
-+ [ID_AN7583] = {
-+ .id = ID_AN7583,
-+ .pcs_ops = &mt7530_pcs_ops,
-+ .sw_setup = mt7988_setup,
-+ .phy_read_c22 = mt7531_ind_c22_phy_read,
- .phy_write_c22 = mt7531_ind_c22_phy_write,
- .phy_read_c45 = mt7531_ind_c45_phy_read,
- .phy_write_c45 = mt7531_ind_c45_phy_write,
---- a/drivers/net/dsa/mt7530.h
-+++ b/drivers/net/dsa/mt7530.h
-@@ -20,6 +20,7 @@ enum mt753x_id {
- ID_MT7531 = 2,
- ID_MT7988 = 3,
- ID_EN7581 = 4,
-+ ID_AN7583 = 5,
- };
-
- #define NUM_TRGMII_CTRL 5
-@@ -66,7 +67,8 @@ enum mt753x_id {
-
- #define MT753X_MIRROR_REG(id) ((id == ID_MT7531 || \
- id == ID_MT7988 || \
-- id == ID_EN7581) ? \
-+ id == ID_EN7581 || \
-+ id == ID_AN7583) ? \
- MT7531_CFC : MT753X_MFC)
-
- #define MT753X_MIRROR_EN(id) ((id == ID_MT7531 || \
-@@ -76,19 +78,22 @@ enum mt753x_id {
-
- #define MT753X_MIRROR_PORT_MASK(id) ((id == ID_MT7531 || \
- id == ID_MT7988 || \
-- id == ID_EN7581) ? \
-+ id == ID_EN7581 || \
-+ id == ID_AN7583) ? \
- MT7531_MIRROR_PORT_MASK : \
- MT7530_MIRROR_PORT_MASK)
-
- #define MT753X_MIRROR_PORT_GET(id, val) ((id == ID_MT7531 || \
- id == ID_MT7988 || \
-- id == ID_EN7581) ? \
-+ id == ID_EN7581 || \
-+ id == ID_AN7583) ? \
- MT7531_MIRROR_PORT_GET(val) : \
- MT7530_MIRROR_PORT_GET(val))
-
- #define MT753X_MIRROR_PORT_SET(id, val) ((id == ID_MT7531 || \
- id == ID_MT7988 || \
-- id == ID_EN7581) ? \
-+ id == ID_EN7581 || \
-+ id == ID_AN7583) ? \
- MT7531_MIRROR_PORT_SET(val) : \
- MT7530_MIRROR_PORT_SET(val))
-
-@@ -619,6 +624,11 @@ enum mt7531_xtal_fsel {
- #define CPORT_SW2FE_STAG_EN BIT(1)
- #define CPORT_FE2SW_STAG_EN BIT(0)
-
-+#define AN7583_GEPHY_CONN_CFG 0x7c14
-+#define AN7583_CSR_DPHY_CKIN_SEL BIT(31)
-+#define AN7583_CSR_PHY_CORE_REG_CLK_SEL BIT(30)
-+#define AN7583_CSR_ETHER_AFE_PWD GENMASK(28, 24)
-+
- /* Registers for LED GPIO control (MT7530 only)
- * All registers follow this pattern:
- * [ 2: 0] port 0
--- /dev/null
+From d76556db10bf41cd3ae1ad1d705245afe077a701 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Thu, 22 May 2025 18:53:10 +0200
+Subject: [PATCH 2/3] net: dsa: mt7530: Add AN7583 support
+
+Add Airoha AN7583 Switch support. This is based on Airoha EN7581 that is
+based on Mediatek MT7988 Switch.
+
+Airoha AN7583 require additional tweak to the GEPHY_CONN_CFG register to
+make the internal PHY work.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/20250522165313.6411-3-ansuelsmth@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/dsa/mt7530-mmio.c | 1 +
+ drivers/net/dsa/mt7530.c | 24 ++++++++++++++++++++++--
+ drivers/net/dsa/mt7530.h | 18 ++++++++++++++----
+ 3 files changed, 37 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/dsa/mt7530-mmio.c
++++ b/drivers/net/dsa/mt7530-mmio.c
+@@ -11,6 +11,7 @@
+ #include "mt7530.h"
+
+ static const struct of_device_id mt7988_of_match[] = {
++ { .compatible = "airoha,an7583-switch", .data = &mt753x_table[ID_AN7583], },
+ { .compatible = "airoha,en7581-switch", .data = &mt753x_table[ID_EN7581], },
+ { .compatible = "mediatek,mt7988-switch", .data = &mt753x_table[ID_MT7988], },
+ { /* sentinel */ },
+--- a/drivers/net/dsa/mt7530.c
++++ b/drivers/net/dsa/mt7530.c
+@@ -1153,7 +1153,7 @@ mt753x_cpu_port_enable(struct dsa_switch
+ * is affine to the inbound user port.
+ */
+ if (priv->id == ID_MT7531 || priv->id == ID_MT7988 ||
+- priv->id == ID_EN7581)
++ priv->id == ID_EN7581 || priv->id == ID_AN7583)
+ mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));
+
+ /* CPU port gets connected to all user ports of
+@@ -2589,7 +2589,7 @@ mt7531_setup_common(struct dsa_switch *d
+ mt7530_set(priv, MT753X_AGC, LOCAL_EN);
+
+ /* Enable Special Tag for rx frames */
+- if (priv->id == ID_EN7581)
++ if (priv->id == ID_EN7581 || priv->id == ID_AN7583)
+ mt7530_write(priv, MT753X_CPORT_SPTAG_CFG,
+ CPORT_SW2FE_STAG_EN | CPORT_FE2SW_STAG_EN);
+
+@@ -3157,6 +3157,16 @@ static int mt7988_setup(struct dsa_switc
+ reset_control_deassert(priv->rstc);
+ usleep_range(20, 50);
+
++ /* AN7583 require additional tweak to CONN_CFG */
++ if (priv->id == ID_AN7583)
++ mt7530_rmw(priv, AN7583_GEPHY_CONN_CFG,
++ AN7583_CSR_DPHY_CKIN_SEL |
++ AN7583_CSR_PHY_CORE_REG_CLK_SEL |
++ AN7583_CSR_ETHER_AFE_PWD,
++ AN7583_CSR_DPHY_CKIN_SEL |
++ AN7583_CSR_PHY_CORE_REG_CLK_SEL |
++ FIELD_PREP(AN7583_CSR_ETHER_AFE_PWD, 0));
++
+ /* Reset the switch PHYs */
+ mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_PHY_RST);
+
+@@ -3253,6 +3263,16 @@ const struct mt753x_info mt753x_table[]
+ .pcs_ops = &mt7530_pcs_ops,
+ .sw_setup = mt7988_setup,
+ .phy_read_c22 = mt7531_ind_c22_phy_read,
++ .phy_write_c22 = mt7531_ind_c22_phy_write,
++ .phy_read_c45 = mt7531_ind_c45_phy_read,
++ .phy_write_c45 = mt7531_ind_c45_phy_write,
++ .mac_port_get_caps = en7581_mac_port_get_caps,
++ },
++ [ID_AN7583] = {
++ .id = ID_AN7583,
++ .pcs_ops = &mt7530_pcs_ops,
++ .sw_setup = mt7988_setup,
++ .phy_read_c22 = mt7531_ind_c22_phy_read,
+ .phy_write_c22 = mt7531_ind_c22_phy_write,
+ .phy_read_c45 = mt7531_ind_c45_phy_read,
+ .phy_write_c45 = mt7531_ind_c45_phy_write,
+--- a/drivers/net/dsa/mt7530.h
++++ b/drivers/net/dsa/mt7530.h
+@@ -20,6 +20,7 @@ enum mt753x_id {
+ ID_MT7531 = 2,
+ ID_MT7988 = 3,
+ ID_EN7581 = 4,
++ ID_AN7583 = 5,
+ };
+
+ #define NUM_TRGMII_CTRL 5
+@@ -66,7 +67,8 @@ enum mt753x_id {
+
+ #define MT753X_MIRROR_REG(id) ((id == ID_MT7531 || \
+ id == ID_MT7988 || \
+- id == ID_EN7581) ? \
++ id == ID_EN7581 || \
++ id == ID_AN7583) ? \
+ MT7531_CFC : MT753X_MFC)
+
+ #define MT753X_MIRROR_EN(id) ((id == ID_MT7531 || \
+@@ -76,19 +78,22 @@ enum mt753x_id {
+
+ #define MT753X_MIRROR_PORT_MASK(id) ((id == ID_MT7531 || \
+ id == ID_MT7988 || \
+- id == ID_EN7581) ? \
++ id == ID_EN7581 || \
++ id == ID_AN7583) ? \
+ MT7531_MIRROR_PORT_MASK : \
+ MT7530_MIRROR_PORT_MASK)
+
+ #define MT753X_MIRROR_PORT_GET(id, val) ((id == ID_MT7531 || \
+ id == ID_MT7988 || \
+- id == ID_EN7581) ? \
++ id == ID_EN7581 || \
++ id == ID_AN7583) ? \
+ MT7531_MIRROR_PORT_GET(val) : \
+ MT7530_MIRROR_PORT_GET(val))
+
+ #define MT753X_MIRROR_PORT_SET(id, val) ((id == ID_MT7531 || \
+ id == ID_MT7988 || \
+- id == ID_EN7581) ? \
++ id == ID_EN7581 || \
++ id == ID_AN7583) ? \
+ MT7531_MIRROR_PORT_SET(val) : \
+ MT7530_MIRROR_PORT_SET(val))
+
+@@ -619,6 +624,11 @@ enum mt7531_xtal_fsel {
+ #define CPORT_SW2FE_STAG_EN BIT(1)
+ #define CPORT_FE2SW_STAG_EN BIT(0)
+
++#define AN7583_GEPHY_CONN_CFG 0x7c14
++#define AN7583_CSR_DPHY_CKIN_SEL BIT(31)
++#define AN7583_CSR_PHY_CORE_REG_CLK_SEL BIT(30)
++#define AN7583_CSR_ETHER_AFE_PWD GENMASK(28, 24)
++
+ /* Registers for LED GPIO control (MT7530 only)
+ * All registers follow this pattern:
+ * [ 2: 0] port 0
+++ /dev/null
-From 8a38220c6bf6d79ecb1c95b083e062bd7221dea9 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Sat, 9 Aug 2025 13:24:57 +0200
-Subject: [PATCH] cpufreq: airoha: Add support for AN7583 SoC
-
-New Airoha AN7583 SoC use the same exact logic to control the CPU
-frequency. Add the Device compatible to the block list for
-cpufreq-dt-plat and to the Airoha CPUFreq driver compatible list.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
----
- drivers/cpufreq/airoha-cpufreq.c | 1 +
- drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/drivers/cpufreq/airoha-cpufreq.c
-+++ b/drivers/cpufreq/airoha-cpufreq.c
-@@ -121,6 +121,7 @@ static struct platform_driver airoha_cpu
- };
-
- static const struct of_device_id airoha_cpufreq_match_list[] __initconst = {
-+ { .compatible = "airoha,an7583" },
- { .compatible = "airoha,en7581" },
- {},
- };
---- a/drivers/cpufreq/cpufreq-dt-platdev.c
-+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
-@@ -103,6 +103,7 @@ static const struct of_device_id allowli
- * platforms using "operating-points-v2" property.
- */
- static const struct of_device_id blocklist[] __initconst = {
-+ { .compatible = "airoha,an7583", },
- { .compatible = "airoha,en7581", },
-
- { .compatible = "allwinner,sun50i-h6", },
--- /dev/null
+From 8640689f17fd550c3e89d2b47ecb02536c58baf3 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Sat, 9 Aug 2025 13:28:30 +0200
+Subject: [PATCH] cpufreq: airoha: Add support for AN7583 SoC
+
+New Airoha AN7583 SoC use the same exact logic to control the CPU
+frequency. Add the Device compatible to the block list for
+cpufreq-dt-plat and to the Airoha CPUFreq driver compatible list.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+---
+ drivers/cpufreq/airoha-cpufreq.c | 1 +
+ drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/drivers/cpufreq/airoha-cpufreq.c
++++ b/drivers/cpufreq/airoha-cpufreq.c
+@@ -121,6 +121,7 @@ static struct platform_driver airoha_cpu
+ };
+
+ static const struct of_device_id airoha_cpufreq_match_list[] __initconst = {
++ { .compatible = "airoha,an7583" },
+ { .compatible = "airoha,en7581" },
+ {},
+ };
+--- a/drivers/cpufreq/cpufreq-dt-platdev.c
++++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+@@ -103,6 +103,7 @@ static const struct of_device_id allowli
+ * platforms using "operating-points-v2" property.
+ */
+ static const struct of_device_id blocklist[] __initconst = {
++ { .compatible = "airoha,an7583", },
+ { .compatible = "airoha,en7581", },
+
+ { .compatible = "allwinner,sun50i-h6", },
projects / openwrt / openwrt.git / commitdiff